intref_200.000MHz.txt 858 B

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162
  1. 0x000000;//SPI Mode Serial Port Configuration
  2. 0x000200;
  3. 0x000300;
  4. 0x000400;
  5. 0x000500;
  6. 0x000600;
  7. 0x00107C;
  8. 0x001102;//R counter Bits[ 7:0]
  9. 0x001200;//R counter Bits[13:8]
  10. 0x001300;//A counter Bits[ 5:0]
  11. 0x001419;//B counter Bits[ 7:0]
  12. 0x001500;//B counter Bits[12:0]
  13. 0x001604;
  14. 0x0017B4;// STATUS:Lock Detect HIGH
  15. 0x001887;// Enable CMOS dc offset
  16. 0x001900;
  17. 0x001A2D;
  18. 0x001B00;
  19. 0x001C02;
  20. 0x001D00;
  21. 0x001E00;
  22. 0x001F00;
  23. 0x002000;
  24. 0x00F025;
  25. 0x00F165;
  26. 0x00F265;
  27. 0x00F364;
  28. 0x00F464;
  29. 0x00F565;
  30. 0x00F665;
  31. 0x00F765;
  32. 0x00F864;
  33. 0x00F964;
  34. 0x00FA64;
  35. 0x00FB65;
  36. 0x00FC00;
  37. 0x00FD00;
  38. 0x00FE00;
  39. 0x019099;
  40. 0x019100;
  41. 0x019200;
  42. 0x019300;
  43. 0x019400;
  44. 0x019500;
  45. 0x019600;
  46. 0x01970F; //9520clkdelayctrl group 3
  47. 0x019800;
  48. 0x019900;
  49. 0x019A00;
  50. 0x019B00;
  51. 0x019C00;
  52. 0x01E003;//VCO divider: 5
  53. 0x01E122;
  54. 0x023201;
  55. 0x001887;
  56. 0x023201;
  57. 0x023000;
  58. 0x023201;
  59. 0x023001;
  60. 0x023201;
  61. 0x023000;
  62. 0x023201;